Материал: m013500e_x06

76 • Feldbus Coupler/Controller

Fieldbus Controller 750-806

In addition, the Controller offers further memory spaces which, however, cannot be accessed from the fieldbus side:

RAM The RAM memory is used to create variables not required for communication with the interfaces but for internal processing, such as computation of results.

Retain The retain memory is a non-volatile memory, i.e. all values are retained following a voltage failure. The memory management is automatic. In this memory area, flags for the IEC 61131-3 program are filed together with variables without memory space addressing or variables which are explicitly defined with "var retain".

Note

The automatic memory management can cause a data overlap. For this reason, we recommend not to use a mix of flags and retain variables.

Code The IEC 61131-3 program is filed in the code memory. The code memory memory is a flash ROM. Once the supply voltage is applied, the

program is transmitted from the flash to the RAM memory. After an error-free start-up, the PFC cycle starts when the operating mode switch is turned to its upper position or by a start command from WAGO-I/O-PRO 32.

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DeviceNet

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Fieldbus Controller 750-806

3.2.5.3 Addressing

3.2.5.3.1 Fieldbus Specific

Once the supply voltage is applied, the Assembly Object maps data from the process image. As soon as a connection is established, a DeviceNet Master (scanner) can address and access the data by "Class", "Instance" and "Attribute" or read and/or write the data using I/O connections.

Data mapping depends on the selected Assembly instance of the static assembly or on the application specific determination with the dynamic Assembly.

Further information

The Assembly Instances of the static Assembly are described in chapter 5.5.1.1 "Assembly Instance".

Further information

For information regarding the dynamic Assembly, please refer to chapter 3.2.7.4 "Dynamic Assembly".

Note

For the number of input and output bits or bytes of the individual I/O modules, please refer to the corresponding I/O module description.

Note

A process image restructuring may result if a node is changed or extended. In this case, the process data addresses also change in comparison with earlier ones. In the event of adding a module, take the process data of all previous modules into account.

WAGO-I/O-SYSTEM 750

DeviceNet

78 • Feldbus Coupler/Controller

Fieldbus Controller 750-806

Example for static assembly (default assembly):

In this example, the fieldbus node arrangement looks like this:

1)1 fieldbus Controller DeviceNet (750-806)

2)1 digital 4-channel input module (i. e. 750-402),

3)1 digital 4- channel output module (z. B. 750-504),

4)1 analog 2- channel output module with 2 bytes per channel (i. e. 750-552),

5)1 analog 2- channel input module with 2 bytes per channel (i. e. 750-456),

6)1 End module (750-600).

Input process image:

Default process data, input image (Assembly Class, Instance 4)

1)DI = Digital Input

2)DS = Diagnostic Status

Output process image:

Default process data, output image (Assembly Class, Instance 1)

1) DO = Digital Output

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Fieldbus Controller 750-806

3.2.5.3.2 Absolute Addressing

The CPU has direct access to the bus terminal data through absolute addresses. Addressing begins with the address 0 both with inputs and outputs. The corresponding addresses for bits, bytes and double words (DWord) are derived from the word addresses.

The structure of the process image is described in chapter 3.2.4 Process Image. Addressing is done in this structure.

3.2.5.3.3 Calculate Addresses

The word address is the basis for calculation (word).

3.2.5.3.4 Address Range for I/O Module Data

WAGO-I/O-SYSTEM 750

DeviceNet

80 • Feldbus Coupler/Controller

Fieldbus Controller 750-806

3.2.5.3.5 Address Range for Fieldbus Variables

3.2.5.3.6 Address Range for Flags

All flags are non volatile (retain).

3.2.5.3.7 Example for Absolute Addresses

The character 'X' for single bits can be deleted, e.g.%I14.0, %Q6.10, %M11.7

WAGO-I/O-SYSTEM 750

DeviceNet