Материал: m012900e

112 • I/O modules

Counter modules 750-404/000-003

Structure of CONTROL and STATUS byte

The control byte has the following bits:

Bit Description

The status byte has the following bits:

Bit Description

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Counter modules 750-404/000-003

Structure of the Input and Output data

The input data represents the CLOCK frequency as a binary value. The representation depends on the RANGE_SEL bits in the CONTROL byte. Even the method of measuring is selected via these bits. The following table illustrates the different modes.

Attention

When a new frequency range is requested, the application has to wait for valid data until the RANGE_SEL ACK bits contain the new frequency range. The maximum delay can be calculated using the following formula.

If the gate is enabled the input data contains the last valid frequency value. In this state the application cannot request a new range.

The valid frequency range stretches from 0.1 Hz (100D) up to 10 kHz (100000D).

To recognize static CLOCK signals, a watchdog timer is implemented. The default value for the timer is 10s. The timer resets on every Power On.

The application is able to change the watchdog time during operation by using the CONTROL byte.

This can be initiated by writing the corresponding value into the output bytes OUTPUT_DATA 1 and OUTPUT_DATA 0 before setting the TVD REQ bit in the CONTROL byte.

The success of the parameter transfer is acknowledged by the module via the TVD ACK bit in the STATUS information.

Attention

The range of the watchdog timer stretches from 0 to 16383ms (0x0000H to 0x3FFFH) in steps of 1ms per digit.

Values which raise the permitted range of the watchdog timer are masked with 0x3FFF.

If the maximum possible frequency of the different ranges is raised (see the table with maximum frequency ratings), the module will return the non valid data 0xFFFFFFFFH.

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114 • I/O modules

Counter modules 750-404/000-004

Technical description

The counter module also can be ordered as Counter with switching outputs with item number 750-404/000-004.

The counter module 750-404/000-004 begins processing with pulses at the CLOCK input. The changes from 0 V to 24 V are counted.

The counter counts up if the input U/D is set at 24 V. With an open circuit input or 0 V the counter counts backwards.

The terminals O1 and O2 work as binary outputs. Each output can be activated via specific bits in the CONTROL byte.

The high "on"states of the input and output channels are each indicated by a LED.

The counter module can operate with all WAGO-I/O-SYSTEM bus-couplers (except for the economy type).

Organization of the input and output data:

The control byte has the following bits

The status byte has the following bits:

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Counter modules 750-404/000-004

With the control and status byte the following tasks are possible:

Setting the counter:

Put Bit 5 into the control byte. The counter with the 32 bit value is loaded into output bytes 0-3. As long as the bits are set, the counter can stop and information is stored. The ensuing data of the counter will be conveyed to bit 5 of status byte.

Blocking the counter:

Bit 4 is set into the control byte, then the count process is suppressed. Bit 4 in the status byte communicates the suppression of the counter.

Setting the outputs:

Bits 2 and 3 set the additional two outputs of the counter module.

Switching the outputs dependent of the counter:

The bits 0 and 1 activate the function: output dependent setting of binary outputs. If the counter reading 0x80000000 is exceeded, output A1 is activated. For the output A2 only the bottom 16 bits of the counter reading are taken into account which means that output A2 is activated as soon as the counter reading 0x8000 is exceeded. Having reached 0 again, the outputs are reset. If bits 2 or 3 are also set, they have priority, so that the corresponding output is set independent of the counter reading.

The result of the counter is in binary.

Example how to activate the digital outputs:

Set the digital output after 4.000 pulses have been counted. There are several possibilities to set an output.

If A1 is used as an automatic switching output and if the counter is to count up, set the counter to

0x80000000 - 4000 = 0x7FFFF060

and apply + 24V to the V/R input. Furthermore, activate bit 0 in the control byte. After 4000 pulses, the counter reading of 0x80000000 is reached and output A1 activated.

If you wish the counter to count down, pre-set 0x80000000 + 4000 = 0x80000FA0

and apply 0V to V/R. After 4000 pulses the counter reading 0x80000000 is reached and output A1 deactivated.

If A2 is to be used as a switching output, load the counter with 0x8000 - 4000 = 0x7060 or

0x8000 + 4000 = 0x8FA0

respectively, because only the bottom 16 bits of the counter are used for switching output A2. Instead of bit 0 now activate bit 1 in the control byte.

The binary output not involved each time can be directly addressed by the controls via bit 2 and 3.

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116 • I/O modules

Counter modules 750-404/000-005

Technical description

The mode described here is a 2 channel rising edge up counter 16 bit.

In this mode, the U/D input of module 750-404 is used for the clock input of the second counter.

The following description is preliminary and is applicable to the factory configuration.

The counter module can operate with all WAGO-I/O-SYSTEM bus-couplers (except for the economy type).

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