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DATASHEET |
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ICL7106, ICL7107, ICL7107S |
FN3082 |
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31/2 Digit, LCD/LED Display, A/D Converters |
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Rev 9.00 |
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October 24, 2014 |
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The Intersil ICL7106 and ICL7107 are high performance, low power, 31/2 digit A/D converters. Included are seven segment decoders, display drivers, a reference, and a clock. The ICL7106 is designed to interface with a liquid crystal display (LCD) and includes a multiplexed backplane drive; the ICL7107 will directly drive an instrument size light emitting diode (LED) display.
The ICL7106 and ICL7107 bring together a combination of high accuracy, versatility, and true economy. It features auto zero to less than 10µV, zero drift of less than 1µV/°C,
input bias current of 10pA (max) and rollover error of less than one count. True differential inputs and reference are useful in all systems, but give the designer an uncommon advantage when measuring load cells, strain gauges and other bridge type transducers. Finally, the true economy of single power supply operation (ICL7106), enables a high performance panel meter to be built with the addition of only 10 passive components and a display.
Features
•Guaranteed zero reading for 0V input on all scales
•True polarity at zero for precise null detection
•1pA typical input current
•True differential input and reference, direct display drive - LCD ICL7106, LED lCL7107
•Low noise - less than 15µVP-P
•On-chip clock and reference
•Low power dissipation - typically less than 10mW
•No additional active circuits required
•Enhanced display stability
•Pb-free (RoHS compliant)
Ordering Information
PART NUMBER |
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TEMP. RANGE |
PACKAGE |
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(Note 2) |
PART MARKING |
(°C) |
(Pb-Free) |
PKG. DWG. # |
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ICL7106CPLZ |
ICL7106CPLZ |
0 to 70 |
40 Ld PDIP (Note 3) |
E40.6 |
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ICL7106CM44Z (Note 4) |
ICL7106 CM44Z |
0 to 70 |
44 Ld MQFP |
Q44.10x10 |
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ICL7106CM44ZT (Notes 4, 5) |
ICL7106 CM44Z |
0 to 70 |
44 Ld MQFP Tape and Reel |
Q44.10x10 |
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ICL7107CPLZ |
ICL7107CPLZ |
0 to 70 |
40 Ld PDIP (Note 3) |
E40.6 |
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ICL7107SCPLZ |
ICL7107SCPLZ |
0 to 70 |
40 Ld PDIP (Notes 1, 3) |
E40.6 |
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ICL7107CM44Z (Note 4) |
ICL7107 CM44Z |
0 to 70 |
44 Ld MQFP |
Q44.10x10 |
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ICL7107CM44ZT (Notes 4, 5) |
ICL7107 CM44Z |
0 to 70 |
44 Ld MQFP Tape and Reel |
Q44.10x10 |
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NOTES: |
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1.“S” indicates enhanced stability.
2.These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3.Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
4.For Moisture Sensitivity Level (MSL), please see product information page for ICL7106, ICL7107, ICL7107S. For more information on MSL, please see tech brief TB363.
5.Please refer to TB347 for details on reel specifications.
FN3082 |
Rev 9.00 |
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Page 1 of 17 |
October 24, 2014 |
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ICL7106, ICL7107, ICL7107S
Pin Configurations
ICL7106, ICL7107, ICL7107S (PDIP)
TOP VIEW
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V+ |
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1 |
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40 |
OSC 1 |
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D1 |
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OSC 3 |
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B1 |
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A1 |
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REF HI |
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F1 |
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REF LO |
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G1 |
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CREF+ |
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E1 |
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CREF- |
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D2 |
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C2 |
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IN HI |
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B2 |
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IN LO |
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A2 |
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F2 |
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E2 |
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INT |
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D3 |
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V- |
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B3 |
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G2 (10’s) |
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F3 |
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C3 |
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E3 |
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A3 |
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(1000) AB4 |
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G3 |
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POL |
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BP/GND |
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ICL7106, ICL7107 (MQFP)
TOP VIEW
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REFHI |
REFLO |
C |
C |
COMMON |
HIIN |
LOIN |
Z-A |
BUFF |
INT -V |
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NC |
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1 |
44 43 42 41 40 |
39 |
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37 36 |
35 34 |
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NC |
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TEST |
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OSC 3 |
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G3 |
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OSC 2 |
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BP/GND |
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OSC 1 |
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POL |
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V+ |
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AB4 |
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D1 |
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E3 |
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C1 |
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B1 |
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F1 G1 E1 D2 C2 B2 |
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FN3082 |
Rev 9.00 |
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Page 2 of 17 |
October 24, 2014 |
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ICL7106, ICL7107, ICL7107S
Absolute Maximum Ratings
Supply Voltage
ICL7106, V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V ICL7107, V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V ICL7107, V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V Analog Input Voltage (Either Input) (Note 6) . . . . . . . . . . . . . . . . . . . V+ to V- Reference Input Voltage (Either Input). . . . . . . . . . . . . . . . . . . . . . . . V+ to V-
Clock Input
ICL7106 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TEST to V+ ICL7107 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND to V+
Thermal Information |
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Thermal Resistance (Typical) |
JA (oC/W) |
PDIP Package (Note 7) . . . . . . . . . . . . . . . . . . . . . . . . . . |
50 |
MQFP Package (Note 7) . . . . . . . . . . . . . . . . . . . . . . . . . |
75 |
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . |
. . . . . . . .+150°C |
Maximum Storage Temperature Range . . . . . . . . . . . . . . |
-65°C to +150°C |
Pb-Free Reflow Profile (MQFP Package only) . . . . . . . . . . |
. . . . . see TB493 |
NOTE: Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES:
6.Input voltages may exceed the supply voltages provided the input current is limited to ±100µA.
7.JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications (Note 8)
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNIT |
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SYSTEM PERFORMANCE |
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Zero Input Reading |
VIN = 0.0V, full scale = 200mV |
-000.0 |
000.0 |
+000.0 |
Digital |
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Reading |
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Stability (Last Digit) (ICL7107S Only) |
Fixed input voltage (Note 11) |
-000.0 |
000.0 |
+000.0 |
Digital |
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Reading |
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Ratiometric Reading |
VlN = VREF, VREF = 100mV |
999 |
999/1000 |
1000 |
Digital |
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Reading |
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Rollover Error |
-VIN = +VlN 200mV |
- |
±0.2 |
±1 |
Counts |
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Difference in reading for equal positive and negative inputs |
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near full scale |
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Linearity |
Full scale = 200mV or full scale = 2V maximum deviation |
- |
±0.2 |
±1 |
Counts |
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from best straight line fit (Note 10) |
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Common Mode Rejection Ratio |
VCM = 1V, VIN = 0V, full scale = 200mV (Note 10) |
- |
50 |
- |
µV/V |
Noise |
VIN = 0V, full scale = 200mV |
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15 |
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(peak-to-peak value not exceeded 95% of time) |
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Leakage Current Input |
VlN = 0 (Note 10) |
- |
1 |
10 |
pA |
Zero Reading Drift |
VlN = 0, 0°C to +70°C (Note 10) |
- |
0.2 |
1 |
µV/°C |
Scale Factor Temperature Coefficient |
VIN = 199mV, 0°C to +70°C, |
- |
1 |
5 |
ppm/°C |
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(ext. ref. 0ppm/×°C) (Note 10) |
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End Power Supply Character V+ Supply Current |
VIN = 0 (does not include LED current for ICL7107) |
- |
1.0 |
1.8 |
mA |
End Power Supply Character V- Supply Current |
ICL7107 Only |
- |
0.6 |
1.8 |
mA |
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COMMON Pin Analog Common Voltage |
25kΩ between common and positive supply (with respect |
2.4 |
3.0 |
3.2 |
V |
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to + supply) |
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Temperature Coefficient of Analog Common |
25kΩ between common and positive supply (with respect |
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80 |
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ppm/°C |
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to + supply) |
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DISPLAY DRIVER ICL7106 ONLY |
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Peak-to-Peak Segment Drive Voltage |
V+ = to V- = 9V (Note 9) |
4 |
5.5 |
6 |
V |
Peak-to-Peak Backplane Drive Voltage |
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FN3082 |
Rev 9.00 |
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Page 3 of 17 |
October 24, 2014 |
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ICL7106, ICL7107, ICL7107S
Electrical Specifications (Note 8) |
(Continued) |
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PARAMETER |
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TEST CONDITIONS |
MIN |
TYP |
MAX |
UNIT |
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DISPLAY DRIVER ICL7107 ONLY |
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Segment Sinking Current |
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V+ = 5V, segment voltage = 3V |
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Except Pins AB4 and POL |
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5 |
8 |
- |
mA |
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Pin AB4 Only |
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10 |
16 |
- |
mA |
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Pin POL Only |
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4 |
7 |
- |
mA |
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NOTES: |
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8.Unless otherwise noted, specifications apply to both the ICL7106 and ICL7107 at TA = +25°C, fCLOCK = 48kHz. ICL7106 is tested in the circuit of Figure 1. ICL7107 is tested in the circuit of Figure 2.
9.Back plane drive is in phase with segment drive for “off” segment, 180 degrees out of phase for “on” segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV.
10.Limit is not production tested. The maximum was established via characterization and/or design simulations.
11.Sample tested.
Typical Applications and Test Circuits
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+IN- |
+ |
9V |
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- |
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R |
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R5 |
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1 |
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C |
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R3 |
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R4 |
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C1 |
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5 C2 |
R2 |
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C3 |
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DISPLAY |
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C |
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4 |
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40 |
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38 |
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31 |
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28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
OSC1 |
OSC2 OSC3 |
TEST REFHI |
REFLO |
+ |
- |
COM INHI |
INLO A-Z BUFF INT V- G2 C3 A3 G3 BP |
C |
C |
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REF |
REF |
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ICL7106
V+D1C1B1A1F1G1E1D2C2B2A2F2E2D3B3F3E3AB4POL
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
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20 |
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DISPLAY |
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C1 = 0.1µF C2 = 0.47µF C3 = 0.22µF C4 = 100pF C5 = 0.02µF R1 = 24kΩ R2 = 47kΩ R3 = 100kΩ R4 = 1kΩ R5 = 1MΩ
FIGURE 1. ICL7106 TEST CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE
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+5V |
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+IN- |
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-5V |
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R1 |
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R5 |
C5 C2 R2 |
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R3 |
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C |
R4 |
C1 |
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C3 |
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DISPLAY |
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4 |
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40 |
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38 |
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36 |
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28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
OSC1 |
OSC2 |
OSC3 |
TEST |
REFHI |
REFLO |
+ |
- |
COM |
INHI |
INLO |
A-Z |
BUFF |
INT |
V- |
G2 |
C3 |
A3 |
G3 |
GND |
C |
C |
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REF |
REF |
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ICL7107 |
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V+ |
D1 |
C1 |
B1 |
A1 |
F1 |
G1 |
E1 |
D2 |
C2 |
B2 |
A2 |
F2 |
E2 |
D3 |
B3 |
F3 |
E3 |
AB4 |
POL |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
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DISPLAY |
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C1 = 0.1µF C2 = 0.47µF C3 = 0.22µF C4 = 100pF C5 = 0.02µF R1 = 24kΩ R2 = 47kΩ R3 = 100kΩ R4 = 1kΩ R5 = 1MΩ
FIGURE 2. ICL7107 TEST CIRCUIT AND TYPICAL APPLICATION WITH LED DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE
FN3082 |
Rev 9.00 |
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Page 4 of 17 |
October 24, 2014 |
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ICL7106, ICL7107, ICL7107S
Design Information Summary Sheet
•OSCILLATOR FREQUENCY
fOSC = 0.45/RC
COSC > 50pF; ROSC > 50kΩ fOSC (Typ) = 48kHz
•OSCILLATOR PERIOD tOSC = RC/0.45
•INTEGRATION CLOCK FREQUENCY fCLOCK = fOSC/4
•INTEGRATION PERIOD tINT = 1000 x (4/fOSC)
•60/50Hz REJECTION CRITERION tINT/t60Hz or tlNT/t60Hz = Integer
•OPTIMUM INTEGRATION CURRENT IINT = 4µA
•FULL SCALE ANALOG INPUT VOLTAGE VlNFS (Typ) = 200mV or 2V
•INTEGRATE RESISTOR
VINFS
RINT = ----------------
IINT
• INTEGRATE CAPACITOR
tINT IINT
CINT = -------------------------------
VINT
• INTEGRATOR OUTPUT VOLTAGE SWING
tINT IINT
VINT = -------------------------------
CINT
•VINT MAXIMUM SWING:
(V- + 0.5V) < VINT < (V+ - 0.5V), VINT (Typ) = 2V
• DISPLAY COUNT
VIN
COUNT = 1000 ---------------
VREF
•CONVERSION CYCLE
tCYC = tCL0CK x 4000 tCYC = tOSC x 16,000
when fOSC = 48kHz; tCYC = 333ms
•COMMON MODE INPUT VOLTAGE (V- + 1V) < VlN < (V+ - 0.5V)
•AUTO-ZERO CAPACITOR 0.01µF < CAZ < 1µF
•REFERENCE CAPACITOR 0.1µF < CREF < 1µF
•VCOM
Biased between Vi and V-.
•VCOM V+ - 2.8V
Regulation lost when V+ to V- < 6.8V
If VCOM is externally pulled down to (V+ to V-)/2, the VCOM circuit will turn off.
•ICL7106 POWER SUPPLY: SINGLE 9V
V+ - V- = 9V
Digital supply is generated internally VGND V+ - 4.5V
•ICL7106 DISPLAY: LCD
Type: Direct drive with digital logic supply amplitude.
•ICL7107 POWER SUPPLY: DUAL ±5.0V
V+ = +5V to GND V- = -5V to GND
Digital Logic and LED driver supply V+ to GND
•ICL7107 DISPLAY: LED
Type: Nonmultiplexed Common Anode
Typical Integrator Amplifier Output Waveform (INT Pin)
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AUTO ZERO PHASE |
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SIGNAL INTEGRATE |
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DEINTEGRATE PHASE |
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PHASE FIXED |
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0 - 1999 COUNTS |
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2999 - 1000 |
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1000 COUNTS |
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TOTAL CONVERSION TIME = 4000 x tCLOCK = 16,000 x tOSC
FN3082 |
Rev 9.00 |
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Page 5 of 17 |
October 24, 2014 |
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